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Tianjian Li

Tianjian Li received B.S. degree in computer science and technology from Xi’an Jiao Tong University in 2013. He has obtained Ph.D degree of Computer Science and Engineering of Shanghai Jiao Tong University in 2018. His current research interests include computer architecture, emerging technology and approximate computing. He has published 8 papers towards highly-selective conferences and journals in the field of computer architecture and computer aided-design.

He mainly focuses on two projects: “Low Power Processor Architecture Design Based on CNFET” and “The Neuromorphic Processor Architecture Design based on the Non-volatile Memory”.


Articles:

2017DAC:Efficient Sneak-Path Test for 1R RRAM Crossbar With Voltage Bias

2017DATE :Fault clustering Technique for 3D Memory BISR

2016 ICCD：CNFET-Based High Throughput Register File Architecture

2016 ITC: Defect Tolerance for CNFET-based SRAMS

2015TACD: A Novel Test Method for Metallic CNTs in CNFET-Based SRAM

2015SOCC: On Microarchitectural Modeling for CNFET-based Circuits


SHANGHAI JIAO TONG UNIVERSITY SCHOOL OF ELECTRONIC INFORMATION AND ELECTRICCAL ENGINEERING


Copyright: Advanced Computer Architecture Laboratory, Shanghai ICP, 20180025

Address: Room 125,Tower 3, Department of Computer Science & Engineering,Electronic Information and Electrical Engineering Building,Shanghai Jiao Tong University,800 Dongchuan Rd,Shanghai,200240, P. R. China

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