实验室近年发表的会议论文

2022

[DAC’22]Zhuoran Song, Zhongkai Yu, Naifeng Jing, and Xiaoyao Liang，“E$^2$SR: An End-to-End Video CODEC Assisted System for Super Resolution Acceleration”，ACM/IEEE Design Automation Conference (DAC), 2022

[DAC’22]Fangxin Liu, Wenbo Zhao, Zongwu Wang,Qidong Tang, Yongbiao Chen,Zhezhi He,Naifeng Jing,Xiaoyang Liang and Li Jiang，“EBSP: Evolving Bit Sparsity Patterns for Hardware-Friendly Inference of Quantized Deep Neural Networks”，ACM/IEEE Design Automation Conference (DAC), 2022

[DAC’22]Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yongbiao Chen, Tao Yang, Zhezhi He,Xiaokang Yang and Li Jiang，“SATO: Spiking Neural Network Acceleration via Temporal-Oriented Dataflow and Architecture”，ACM/IEEE Design Automation Conference (DAC), 2022

[DAC’22]Fangxin Liu, Wenbo Zhao,Yongbiao Chen,Zongwu Wang,Zhezhi He,Rui Yang,Qidong Tang, Tao Yang,Cheng Zhuo and Li Jiang，“PIM-DH: ReRAM-based Processing-in-Memory Architecture for Deep Hashing Acceleration”，ACM/IEEE Design Automation Conference (DAC), 2022

[AAAI’22]Fangxin Liu，Wenbo Zhao, Zongwu Wang,Yongbiao Chen,Li Jiang，“SpikeConverter: An Efficient Conversion Framework Zipping the Gap between Artificial Neural Networks and Spiking Neural Networks”，Association for the Advancement of Artificial Intelligence(AAAI)2022

[DATE’22]Tao Yang, Dongyue Li, Zhuoran Song, Yilong Zhao, Fangxin Liu, Zongwu Wang, Zhezhi He and Li Jiang，“DTQAtten: Leveraging Dynamic Token-based Quantization for Efficient Attention Architecture”，Design, Automation & Test in Europe Conference & Exhibition (DATE)2022

[ASP-DAC’22] Zhi Li, Yanan Sun, Zhezhi He, Liukai Xu, Li Jiang, “CIM-ISP: Computing In-Memory for Image Signal Processing”, Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Japan, 2022

2021

[ICCV’21]Fangxin Liu, Wenbo Zhao, Zhezhi He, Yanzhi Wang, Zongwu Wang, Changzhi Dai, Xiaoyao Liang, Li Jiang, “Improving Neural Network Efficiency via Post-training Quantization with Adaptive Floating-Point,”IEEE/CVF International Conference on Computer Vision (ICCV), 2021
[DAC’21]Tao Yang, Dongyue Li, Yibo Han, Yilong Zhao, Fangxin Liu, Xiaoyao Liang, Zhezhi He and Li Jiang, “PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration,” ACM/IEEE Design Automation Conference (DAC), pages 1-6, 2021

[DAC’21]Min Li, Yu Li, Ye Tian, Li Jiang and Qiang Xu, “AppealNet: An Efficient and Highly-Accurate Edge/Cloud Collaborative Architecture for DNN Inference,” ACM/IEEE Design Automation Conference (DAC), pages 1-6, 2021

[ICCAD’21]Fangxin Liu, Wenbo Zhao, Zhezhi He, Zongwu Wang, Yilong Zhao, Yongbiao Chen and Li Jiang, “Bit-Transformer: Transforming Bit-level Sparsity into Higher Preformance in ReRAM-based Accelerator,”to appear in International Conference on Computer-Aided Design (ICCAD), 2021

[CLUSTER’21]Hanchen Guo, Zhehan Lin, Yunfei Gu, Chentao Wu, Li Jiang, Jie Li, Guangtao Xue, Minyi Guo, “Lazy-WL: A Wear-aware Load Balanced Data Redistribution Method for Efficient SSD Array Scaling,”to appear IEEE International Conference on Cluster Computing (CLUSTER), 2021

[ICCD’21]Fangxin Liu, Wenbo Zhao, Zhezhi He, Zongwu Wang, Yilong Zhao, Tao Yang, Xiaoyao Liang, Naifeng Jing and Li Jiang, “SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network,”International Conference on Computer Design (ICCD), 2021

[CIKM’21]Dongyue Li, Tao Yang, Lun Du, Zhezhi He, Li Jiang, “AdaptiveGCN: Efficient GCN Through Adaptively Sparsifying Graphs,” to appear in International Conference on Information and Knowledge Management (CIKM), 2021

[DATE’21]Ziqi Meng, Weikang Qian, Yanan Sun, Yilong Zhao, Rui Yang, and Li Jiang, "Digital offset for RRAM-based neuromorphic computing: a novel solution to conquer cycle-to-cycle variation," to appear in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), pages 1078-1083, 2021

[ISPA’21]Feiyang Wu, Zhuoran Song, Jing Ke, Li Jiang, Naifeng Jing and Xiaoyao Liang, “IPU: Domain Specific Programmable Parallel Microarchitecture for Image Processing,”International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2021 

[GLSVLSI’21]Yilong Zhao, Zhezhi He, Naifeng Jing Jing, Xiaoyao Liang and Li Jiang, “Re2PIM: A Reconfigurable ReRAM-based PIM Design for Variable-sized Vector-Matrix Multiplication”, to appear in ACM Great Lakes Symposium on VLSI (GLSVLSI), pages 15-20, 2021

[GLSVLSI’21]Chen Nie, Jie Lin, Huan Hu, Li Jiang, Xiaoyao Liang, Zhezhi He: “Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support”, ACM Great Lakes Symposium on VLSI (GLSVLSI), pages 347–352, 2021

[GLSVLSI’21]Fangxin Liu, Wenbo Zhao, Zongwu Wang, Tao Yang and Li Jiang, “IM3A: Boosting Deep Neural Network Efficiency via In-Memory Addressing-Assisted Acceleration”, ACM Great Lakes Symposium on VLSI (GLSVLSI), pages 253-258, 2021

[ISCAS’21]Zhuoran Song, Dongyue Li, Zhezhi He, Xiaoyao Liang, Li Jiang, “ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator”, to appear in International Symposium on Circuits and Systems (ISCAS), 2021

[VTS’21]Xingyi Wang, Yu Li, Yiquan Chen, Shiwen Wang, Yin Du, Cheng He, YuZhong Zhang, Pinan Chen, Xin Li, Wenjun Song, Qiang Xu, and Li Jiang, “On Workload-Aware DRAM Failure Prediction in Large-Scale Data Centers,” to appear in IEEE VLSI Test Symposium(VTS), 2021

[CISP-BMEI’21]Yunyan Hong, Qiang Xu and Li Jiang, “Skimming and Scanning for Untrimmed Video Action Recognition,”to appear in International Congress on Image and Signal Processing, BioMedical Engineering and Informatics (CISP-BMEI), 2021

2020

[MICRO’20] Zhuoran Song, Feiyang Wu, Xueyuan Liu, Jing Ke, Naifeng Jing, Xiaoyao Liang.VR-DANN: Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration,IEEE/ACM International Symposium on Microarchitecture, MICRO,Oct. 2020

[ISCA’20] Zhuoran Song, Bangqi Fu, Feiyang Wu, Zhaoming Jiang, Li Jiang, Naifeng Jing, Xiaoyao Liang. DRQ: Dynamic Region-Based Quantization for Deep Neural Network Acceleration. To appear in IEEE/ACM International Symposium on Computer Architecture, ISCA, 2020

[GLSVLSI’20] Zhuoran Song, Yilong Zhao, Yanan Sun, Xiaoyao Liang and Li Jiang.ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory. To appear in ACM Great Lakes Symposium on VLSI, GLSVLSI, 2020

[DAC’20] Zhuoran Song, Jianfei Wang, Tianjian Li, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing.GPNPU: Enabling Efficient Hardware-Based Direct Convolution with Multi-Precision Support in GPU Tensor Cores.To appear in ACM/IEEE Design Automation Conference, DAC, 2020

[ICBET’20] Jing Ke, Qiqing Shen, Yi Guo, Jason D. Wright, Xiaoyao Liang. A Prediction Model for Microsatellite Status from Histology Images. 2020 ACM 10th International Conference on Biomedical Engineering and Technology, 2020

[ACSW’20] Jing Ke, Changchang Liu, Yizhou Lu, Naifeng Jing, Xiaoyao Liang, Fusong Jiang.FIMIL : A high-throughput deep learning model for abnormality detection with weak annotation in microscopy images.ACM International Conference Proceeding Series, February 4, 2020, Proceedings of the Australasian Computer Science Week Multiconference 2020

[DAC’20] Chaoqun Chu, Yanzhi Wang, Yilong Zhao, Xiaolong Ma, Shaokai Ye, Yunyan Hong, Xiaoyao Liang, Yinhe Han and Li Jiang. PIM-Prune: Fine-Grain DCNN pruning for Crossbar-based Process-In-Memory architecture. To appear in ACM/IEEE Design Automation Conference, DAC, 2020

2019

[ICBBT’19]Jing Ke, Zhaoming Jiang,Changchang Liu,Tomasz Bednarz, Arcot Sowmya, Xiaoyao Liang.Selective detection and segmentation of cervical cells.ACM International Conference Proceeding Series, Proceedings of 2019 the 11th International Conference on Bioinformatics and Biomedical Technology, pp.55-61, May 29, 2019

[DATE’19]Zhuoran Song, Ru Wang, Dongyu Ru, Zhenghao Peng, Hongru Huang, Hai Zhao, Xiaoyao Liang and Li Jiang. Approximate Random Dropout for DNN Training Acceleration in GPGPU. In Design, Automation & Test in Europe Conference & Exhibition, Florence, Italy, pp.108-103, March21-25,2019. (CCF-B）

[DAC’19] Xiaoyi Sun, Krishnendu Chakrabarty, Ruirui Huang, Yiquan Chen, Bing Zhao, Hai Cao, Yinhe Han, Xiaoyao Liang, Li Jiang. System level hardware failure prediction using deep learning. To appear in ACM/IEEE Design Automation Conference, Las vegas, US, June 2-6, 2019.(CCF-A）

[ASP-DAC'19]Jianfei Wang, Li Jiang, Jing Ke, Xiaoyao Liang and Naifeng Jing.“A Sharing-Aware L1.5D Cache for Data Reuse in GPGPUs”,accepted by Asia and South Pacific Design Automation Conference, Tokyo, Japan, pp.1-6, January 21-24, 2019. (CCF-C)

[ASP-DAC'19]Houxiang Ji, Li Jiang, Tianjian Li, Naifeng Jing, Jing Ke, Xiaoyao Liang.HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing. Proceedings of the 24th Asia and South Pacific Design Automation Conference, Tokyo, Japan, pp.249-254, January 21-24, 2019.(CCF-C)

2018

[TCAD'18]Li Jiang, Tianjian Li, Naifeng Jing, Nam Sung Kim, Minyi Guo, and Xiaoyao Liang. Cnfet-based High Throughput SIMD Architecture. IEEE Transaction on CAD of Integrated Circuits and Systems, 37(7):1331-1344, 2018. (CCF-A)

[ICCAD'18]ZhenghaoPeng;XuyangChenChengwenXu,NaifengJing,XiaoyaoLiang,Cewu Lu,Li Jiang.AXNet: ApproXimate computing using an end-to-end trainable neural network,acceptedbyIEEE/ACM International Conference on Computer-Aided Design ,San Diego, CA, United states, November 5-8, 2018. (CCF-B)

[FPGA’18]Haiyue Song, Xiang Song, Tianjian Li, Naifeng Jing, Xiaoyao Liang and Li Jiang. A FPGA friendly approximate computing framework with hybrid Neural networks. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, California, February 25~27, 2018. (CCF-B)

[DATE’18]Pu Pang, Yixun Zhang, Tianjian Li, Sung Kyu Lim, Quan Chen, Xiaoyao Liang and Li Jiang. In-growth Test for Monolithic 3D SRAM, accepted by ACM/IEEE Design Automation and Test in Europe Conference, Dresden, Germany, pp.569-572, March 19-23, 2018. (CCF-B)

[ICCAD'18]Haiyue Song, Li Jiang, Chengwen Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang and Qiang Xu. Invocation-driven Neural Approximate Computing with a Multiclass-Classifier and Multiple Approximators. In Proceedings of the International Conference on Computer-Aided Design, San Diego, CA, USA, pp.50. November 5-8, 2018.(CCF-B) 

2017

[DAC'17]Chengwen Xu, Xiangyu Wu, Wenqi Yin, Qiang Xu, Naifeng Jing, Xiaoyao Liang and Li Jiang. On Quality Trade-off Control for Approximate Computing using Iterative Training. ACM/IEEE 2017 Design Automation Conference,Austin,TX,USA，June 16-18, 2017. (CCF-B)

[DAC'17]Tianjian Li, Xiangyu Bi, Naifeng Jing, Xiaoyao Liang and Li Jiang. Sneak-path based Test and Diagnosis for 1R RRAM Crossbar using Voltage Bias Technique. ACM/IEEE 2017 Design Automation Conference , Austin, TX, USA, June 16-18, 2017. (CCF-B)

[DATE'17]Lerong Chen, Jiawen Li, Yiran Chen, Qiuping Deng, Jiyuan Shen, Xiaoyao Liang and Li Jiang. Accelerator-friendly Neural-network Training: Learning Variations and Defects in RRAM Crossbar. The ACM/IEEE Design Automation & Test in Europe Conference and Exhibition, Lausanne, Switzerland. pp.19-24,March 27-31, 2017. (CCF-B)

[DATE'17]Tianjian Li, Yan Han, Xiaoyao Liang, Hsien-Hsin S. Lee and Li Jiang. Fault Clustering Technique for 3D Memory BISR. The ACM/IEEE Design Automation & Test in Europe Conference and Exhibition, Lausanne, Switzerland. pp. 560-565, March 27-31,2017. (CCF-B)

2016 

[MICRO'16]Naifeng Jing, Jianfei Wang, Fengfeng Fan, Wenkang Yu, Li Jiang, Chao Li, Xiaoyao Liang. Cache-Emulated Register File: An Integrated On-Chip Memory Architecture for High Performance GPGPUs, in Proceeding of the 49th Annual IEEE/ACM International Symposium on Microarchitecture,Taipei,Taiwan, pp.1-12,Oct 15-19, 2016. (CCF-A)

[ISCA'16]Chao Li, Zhenhua Wang, Xiaofeng Hou, Haopeng Chen, Xiaoyao Liang, and Minyi Guo. Power Attack Defense: Securing Battery-Backed Data Centers. The 43rd ACM/IEEE International Symposium on Computer Architecture, Seoul Korea, June 18-22,2016. (CCF-A).

[ISPDC’16]Fengfeng Fan, Jianfei Wang, Li Jiang, Xiaoyao Liang and Naifeng Jing. Applying Victim Cache in High Performance GPGPU Computing. The International Symposium on Parallel and Distributed Computing,Fuzhou, China, pp.24-29, July 8-10,2016.(Best Paper Award)

[ITC’16]Tianjian Li, Li Jiang, Xiaoyao Liang, Qiang Xu andKrishnendu Chakrabarty. Defect Tolerance for CNFET-based SRAMs. IEEE International Test Conference,, Fort Worth,USA.November 15-17,2016.(CCF-B)

[ICCD’16]Tianjian Li, Li Jiang, Naifeng Jing, Nam Sung Kim and Xiaoyao Liang. CNFET-Based High Throughput Register File Architecture. IEEE International Conference on Computer Design. Scottsdale, AZ, USA,pp.662-669.October 2-5,2016.(CCF-B)

[ICICM’16]Xiangwei Huang , Pu Pang, Xiaoyao Liang and Li Jiang.A Cost-effective Pre-bond Functional Test Architecture for 3D SoCs.2016 International Conference on Integrated Circuits and Microsystems, Chengdu, China, pp.242-247. November 23-25,2016.

2015

[ICCD’15] L. Jiang, X. Huang, H. Xie, Q. Xu, C. Li, Xiaoyao Liang and H. Li.A Novel TSV Probing Technique with Adhesive Test Interposer,International Conference on Computer Design,ICCD,Oct. 2015.