Journal Publication

2017

[TPDS’17] Naifeng Jing, Jianfei Wang, Qinqin Wang, Li Jiang, Chao Li, Xiaoyao Liang, “IBOM: An Integrated and Balanced On-Chip Memory for High Performance GPGPUs”, to appear in Transactions on Parallel and Distributed Systems, 2018 (CCF-A)

[TCAD’17] Li Jiang, Tianjian Li, Naifeng Jing, Nam Sung Kim, Minyi Guo and Xiaoyao Liang, “CNFET-based High Throughput SIMD Architecture”, to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017 (SCI, CCF-A)

[TVLSI’17] Naifeng Jing, Shunning Jiang, Shuang Chen, Jingjie Zhang, Li Jiang, Chao Li, Xiaoyao Liang, "Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 2, pp. 520 _ 533, 2017 (SCI, CCF-B)

2016

[TPDS’16] Yu Wang, Weikang Qian, Shuchang Zhang, Xiaoyao Liang, Bo Yuan, "A Learning Algorithm for Bayesian Networks and Its Efficient Implementation on GPUs," IEEE Transactions on Parallel and Distributed Systems. 

[TCAD’16] Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing and Li Jiang*, "A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 7, pp. 1192 - 1205, 2016 (SCI, CCF-A)

[TC’16] N. Jing, L. Jiang, T. Zhang, F. Fan, C. Li and X. Liang, "Energy Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs", IEEE Transactions on Computers, vol. 65, no. 1, pp. 122 - 135, 2016 (SCI, CCF-A)

2008-2015

[TJSC’15] Tao Zhang, Jingjie Zhang, Wei Shu, Min-You Wu, Xiaoyao Liang, "Efficient Graph Computation on Hybrid CPU and GPU Systems," The Journal of Supercomputing.

[TACO’15]Tao Zhang, Naifeng Jing, Kaiming Jiang, Wei Shu, Min-You Wu, Xiaoyao Liang,  "Buddy SM: Sharing Pipeline Front-End For Improved Energy Efficiency In GPGPUs," ACM Transactions on Architecture and Code Optimization.

[TVLSI’15] Xiaolong Zhang, Huiyun Li, Li Jiang, Qiang Xu. "A Low-Cost TSV Test and Diagnosis Scheme Based on Binary Search Method", IEEE Transactions on Very Large Scale Integration Systems, vol. 23, no. 11, pp. 2639 - 2647, 2015 (SCI, CCF-B)

[TCAD’13] Li Jiang, Qiang Xu and Willian Eklow, "On Effective Through-Silicon Via Repair for 3D-Stacked ICs", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.32, no.4, pp.559 - 571, April, 2013 (SCI, CCF-A)

[TODAES’11] Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li, “MicroFix: Using Timing Interpolation and Delay Sensors for Power Reduction,” ACM Transactions on Design Automation of Electronic Systems.

[TVLSI’11] Li Jiang, Qiang Xu, Krishnendu Chakrabarty and T. M. Mak., "Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.20, no.9, pp. 1621 - 1633, 2011 (SCI, CCF-B) 

Xiaoyao Liang, Gu-Yeon Wei, David Brooks, “ReVIVaL, Variation Tolerant Architecture Using Voltage Interpolation and Variable Latency,” IEEE Micro Top Picks, 2009.

Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Brooks, “Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability,” IEEE Micro Top Picks, 2008.